Design and Implementation High Speed Low Power Cam with A Parity Bit and Power-Gated ML Sensing

Design and Implementation High Speed Low Power Cam with A Parity Bit and Power-Gated ML Sensing
Authors:PERIKALA MAHESH BABU, M. LAVANYA LATHA, SHARAD KULKARNI

Abstract: Content addressable memory (CAM) offers high-speed search function in a single clock cycle. Due to its parallel match-line ML comparison, CAM is power-hungry. Thus, robust, high-speed and low-power ML sense amplifiers are highly sought-after in CAM designs. In this paper, we introduce a parity bit that leads to 39% sensing delay reduction at a cost of less than 1% area and power overhead. Furthermore, we propose an effective gated-power technique to reduce the peak and average power consumption and enhance the robustness of the design against process variations. A feedback loop is employed to autoturn off the power supply to the comparison elements and hence reduces the average power consumption by 64%. The proposed design can work at a supply voltage down to 0.5 V. 

Keywords: CMOS, Content Addressable Memory (CAM), Match-Line. I. 

INTRODUCTION 

      Content addressable memory (CAM) is a type of solidstate memory in which data are accessed by their contents rather than physical locations. It receives input search data, i.e., a search word, and returns the address of a similar word that is stored in its data-bank [2]. In general, a CAM has three operation modes: READ, WRITE, and COMPARE, among which “COMPARE” is the main operation as CAM rarely reads or writes [5]. Fig. 1(a) shows a simplified block diagram of a CAM core with an incorporated search data register and an output encoder. It starts a compare operation by loading an n-bit input search word into the search data register. The search data are then broadcast into the memory banks through n pairs of complementary search-lines (SLs) and directly compared with every bit of the stored words using comparison circuits. Each stored word has a ML that is shared between its bits to convey the comparison result. Location of the matched word will be identified by an output encoder, as shown in Fig. 1(a).  

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